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Eliyan Supports Latest Version of UCIe Chiplet Interconnect Standard, Continues to Drive Performance and Bandwidth Capabilities to 40Gbps and Beyond to Help Meet the Needs of the Multi-die Era

By: Newsfile

Santa Clara, California--(Newsfile Corp. - August 24, 2023) - Eliyan Corporation, an innovator in the field of efficient chiplet interconnect, announced its support for and compatibility with the new UCIe (Universal Chiplet Interconnect Express) 1.1 specification. The company has been involved with the industry-wide initiative to develop a framework for a more open and interoperable chiplet ecosystem, contributing its expertise and working to deliver the performance and bandwidth required to meet the needs of multi-die architectures.

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About UCIe Consortium 

The UCIe Consortium is an industry consortium dedicated to advancing UCIe (Universal Chiplet Interconnect Express) technology, an open industry standard that defines the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level. UCIe Consortium is led by key industry leaders Advanced Semiconductor Engineering, Inc. (ASE), Alibaba, AMD, Arm, Google Cloud, Intel Corporation, Meta, Microsoft Corporation, NVIDIA, Qualcomm Incorporated, Samsung Electronics, and Taiwan Semiconductor Manufacturing Company. For more information, visit

About Eliyan

Eliyan Corporation is leading the chiplet revolution, focusing on a fundamental challenge with scaling semiconductor performance, size, power, and cost to meet the needs of high-performance computing applications, from desktop to datacenter. It has developed a breakthrough method to enable the industry's highest performing interconnect for homogenous and heterogenous multi-die architectures using standard packaging substrates, enabling increased sustainability through reduction in costs, manufacturing waste and power consumption. The company's Bunch of Wires (BoW) technique, invented by founder Ramin Farjadrad and proven to increase performance by 2x and reduce power in half in advanced process technologies, provides a more efficient approach to developing chiplet-based architectures - which are the pathway to the continued scaling of Moore's Law. More information can be found here.


Mike Sottak

Source: Eliyan

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